The present invention relates to a method for manufacturing a wiring substrate.
FIG. 1 illustrates a semiconductor device 70 including semiconductor elements 71 and 72 mounted on a substrate 73. The semiconductor element 71 is flip-chip-connected to the substrate 73, and the semiconductor element 72 is wire-bonded to the substrate 73. In the semiconductor device 70, bumps 71A, which are arranged on the semiconductor element 71, are flip-chip-connected to connection pads 74, which are formed on an upper surface of the substrate 73. Electrodes 72A are formed on an upper surface of the semiconductor element 72, which is stacked on the semiconductor element 71. The electrodes 72A are wire-bonded by wires 76 to bonding pads 75 formed on the upper surface of the substrate 73.
The mounting of the semiconductor elements 71 and 72 on the substrate 73 using flip-chip connections and wire-bonded connections is effective for miniaturizing the semiconductor device 70. However, the semiconductor elements 71 and 72 are mounted on the substrate 73 using the different connections of flip-chip connections and wire-bonded connections. This results in the need for forming the connection pads 74 for the flip-chip connections and the bonding pads 75 for the wire-bonded connections on the substrate 73.
The connection pads 74, which are joined with bumps 71A of the semiconductor element 71, and the bonding pads 75, which are bonded with the wires 76, undergo different surface treatments. More specifically, the surfaces of the connection pads 74 are coated by solder, and the surfaces of the bonding pads 75 are plated (e.g., nickel plating or gold plating). In this case, after a wiring pattern (not illustrated), pad material for the connection pads 74, and pad material for the bonding pads 75 are applied to the surface of the substrate 73, the pad material of the bonding pads 75 is plated. Then, the pad material of the connection pads 74 is coated with solder. The procedures for coating the pad material of the connection pads 74 with solder will now be described with reference to FIGS. 1 to 4.
First, the bonding pads 75 are covered with masking tape so that solder does not collect on the bonding pads 75. Then, an adhesion layer is applied to the surfaces of pads 74A, which form the connection pads 74. Afterwards, solder powder 78 is deposited on the surface of the adhesion layer. The upper part of FIG. 2 is a plan view illustrating the substrate 73 on which the pads 74A, which are for the connection pads 74, and the bonding pads 75 are formed. The lower part of FIG. 2 illustrates a state in which the solder powder 78 is deposited on the adhesion layer covering the pads 74A.
After removing the masking tape, as illustrated in FIG. 3, flux 79 is applied by a spray nozzle 80 to the entire surface of the substrate 73. Then, a reflow process is performed to melt the solder powder 78 (refer to FIG. 2) and coat the surface of each pad 74A with solder 74B as illustrated in FIG. 4. Afterwards, the flux 79 is removed to obtain the substrate 73 (the wiring substrate) on which the connection pads 74 and bonding pads 75 are formed.
Japanese Laid-Open Patent Publications Nos. 2008-004602 and 07-007244 describe the related art described above.